With the advancement of technology, a modern chip is allowed to have a plurality of various electronic circuits configured within the chip. For example, the integrated circuits (ICs) integrated in the chips can be divided into core circuits and input/output (I/O) circuits, and the core circuits and the I/O circuits are respectively driven by different power supply sources with different voltages. For receiving the externally provided power, pads for core circuits and I/O circuits are required.
It is found that electrostatic charges are easily transferred to the inner circuits in the chip by the pads during processes such as manufacturing, testing, packaging and delivering, etc. Such unwanted electrostatic charges, known as electrostatic discharge (ESD), impact and damage the inner circuits in the chip. As products based on ICs become more delicate, they also become more vulnerable to the impacts from external environment. Thus, ESD presents a constant threat to modern electronics.
As a countermeasure to the ESD issue, various ESD protection circuits and devices have been proposed. Typically, during a normal IC operation, the ESD protection device is turned off. However, when an ESD event occurs, the ESD protection device must be quickly triggered, so that the ESD currents are redirected and bypass the inner circuit. There is therefore a continuing need in the semiconductor processing art to develop an ESD protection device having lower trigger voltage that can be quickly turned on in order to render immediate protection to the inner circuit.
This Discussion of the Background section is for background information only. The statements in this Discussion of the Background are not an admission that the subject matter disclosed in this section constitutes a prior art to the present disclosure, and no part of this section may be used as an admission that any part of this application, including this Discussion of the Background section, constitutes prior art to the present disclosure.